rcar_gen3: drivers: swdt: Access SCR in EL3

The code runs in EL3, use EL3 accessors to manipulate the interrupt bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

diff --git a/drivers/renesas/rcar/watchdog/swdt.c b/drivers/renesas/rcar/watchdog/swdt.c
index 42f865349566547ca8830d6823fcb05eafcba817..7793ae5009d64c080c3c9adc0c6df26347e617b1 100644 (file)
--- a/drivers/renesas/rcar/watchdog/swdt.c
+++ b/drivers/renesas/rcar/watchdog/swdt.c
@@ -133,7 +133,11 @@ void rcar_swdt_release(void)
            (ARM_IRQ_SEC_WDT & ~ITARGET_MASK);
        uint32_t i;
 
+       /* Disable FIQ interrupt */
        write_daifset(DAIF_FIQ_BIT);
+       /* FIQ interrupts are not taken to EL3 */
+       write_scr_el3(read_scr_el3() & ~SCR_FIQ_BIT);
+
        swdt_disable();
        gicv2_cpuif_disable();